PQC-HA: A Framework for Prototyping and In-Hardware Evaluation of Post-Quantum Cryptography Hardware Accelerators

Researchers at TU Darmstadt have published a technical paper titled “PQC-HA: A Framework for Prototyping and In-Hardware Evaluation of Post-Quantum Cryptography Hardware Accelerators.” The paper explores the optimization of software and hardware implementations of candidate schemes in the NIST Post-Quantum Cryptography standardization project.

The study focuses on two winning schemes from the project, CRYSTALS Kyber and CRYSTALS Dilithium, which serve as a Key Encapsulation Mechanism (KEM) and Digital Signature Algorithm (DSA), respectively. Using the TaPaSCo open-source framework, the researchers create hardware building blocks for both schemes using High-level Synthesis (HLS) from minimally modified ANSI C software reference implementations.

To verify the functionality of these hardware building blocks, a generic TaPaSCo host runtime application is developed in Rust. The application utilizes the standard NIST interface and the corresponding Known Answer Test mechanism to evaluate the performance of the accelerators on actual hardware. This approach allows for the verification and evaluation of Post-Quantum Cryptography accelerators on real hardware.

The study also evaluates the communication overhead for TaPaSCo hardware accelerators on PCIe-connected FPGA devices and compares it with previous work and optimized AVX2 software reference implementations. The results highlight the feasibility of using TaPaSCo to evaluate the performance of Post-Quantum Cryptography accelerators on real hardware.

Furthermore, the study measures the off-chip accelerator communication overhead of the NIST standard interface. Interestingly, this overhead alone outweighs the execution wall clock time of the optimized software reference implementation of Kyber at Security Level 1.

This research paper provides valuable insights into the prototyping and in-hardware evaluation of Post-Quantum Cryptography hardware accelerators. It demonstrates the feasibility of using TaPaSCo to verify and evaluate the performance of these accelerators on real hardware. The findings contribute to the ongoing efforts in the NIST Post-Quantum Cryptography standardization project and pave the way for future advancements in secure cryptographic systems.

Source: Sattel, Richard, Christoph Spang, Carsten Heinz, and Andreas Koch. “PQC-HA: A Framework for Prototyping and In-Hardware Evaluation of Post-Quantum Cryptography Hardware Accelerators.” arXiv preprint arXiv:2308.06621 (2023).